1. Field of the Invention
The present invention relates to the field of computer systems. More specifically, the present invention relates to instruction fetching and issuing on computer systems where an instruction being fetched may be dependent on a buffered store instruction.
2. Background
It is known in the art that some computer applications employ self-modifying code sequences. A self-modifying code sequence is a sequence of instructions where a first earlier instruction is modified by a second later instruction. Thus, if the instruction sequence is to be executed multiple number of times, starting with the second iteration, the first earlier instruction of the current iteration must be executed after the second later instruction of the immediately preceding iteration, in order for the instruction sequence to be executed correctly.
A common approach employed to modify the first earlier instruction is for the second later instruction to store the modifying information into the appropriate memory locations of the first earlier instruction. Since on some computer systems, store instructions can be buffered, it is critical then under this approach that if the modifying second subsequent store instruction is buffered, the fetching and issuing of the dependent first earlier instruction be delayed or the buffered modifying information be forwarded to override the dependent operands of the first earlier instruction.
A particular example of computer systems where store instructions may be buffered is computer systems where issued instructions may be executed out-of-order. Out-of-order execution is a technique for improving execution performance of a computer system. On such a computer system, instructions are fetched and issued in order into a reservation station. Some instructions are even fetched and issued speculatively assuming their branches will be taken. The issued instructions are held in the reservation station pending resolution of their operands having dependency on the execution results of preceding instructions. The instructions are then dispatched from the reservation station to the appropriate execution units for execution as soon as their operands are resolved. The execution results of integer, floating point, and load operations are held in reorder buffers and retired/committed in order. Store instructions with the store destinations calculated are buffered, and then retired/committed in order. The retired/committed store instructions are in turn executed in "background" when it is "convenient" for the memory system. Some buffered store instructions are retired/committed and executed at the same time. Some of the speculative: execution results and speculatively buffered stores wound up being discarded when it was subsequently determined that the branches were not taken. Thus, the instructions are not necessarily dispatched and executed in the order they are issued, thereby resulting in potential faster overall performance.
The data integrity and correctness of out-of-order execution clearly rely on having the execution results and buffered stores retired/committed in a proper and orderly manner, and with the inaccurately speculated execution results and buffered stores being properly purged. In addition, the data integrity and correctness of out-of-order execution also rely on inter-instruction operand dependencies being properly detected and resolved before the dependent instructions are dispatched for execution. Typically, the reservation station has the primary responsibility for detecting inter-instruction operand dependencies. However, certain inter-instruction operand dependencies are not detectable by the reservation station. A particular example is the type of dependency between the first earlier instruction and the second later instruction of self-modifying code sequence described earlier.
For example, consider a loop having two instructions where a first earlier instruction adds a constant to a first variable and a second later instruction stores the value of a second variable into the first earlier instruction modifying the constant. Starting with the second iteration, the execution of the first earlier instruction of the current iteration is dependent on the execution result of the second later instruction in the immediately preceding iteration. However, to the reservation station, the operands of the first earlier instruction always appear to be independent and resolved, and will be dispatched for execution immediately whenever it is issued the instruction. Thus, if a subsequent iteration of the loop is speculatively fetched and issued, the first earlier instruction will be incorrectly executed, unless as described earlier, it can be ensured that the fetching and issuing of the dependent first earlier instruction is after the execution of the second later store instruction of the immediately preceding iteration, or, alternatively, the modifying information is forwarded to override the dependent operand of the dependent first earlier instruction.
Thus, it is desirable to prevent incorrect fetching of an instruction of a self-modifying code sequence with dependency on a buffered store, particularly on a computer system where instructions may be executed out-of-order. It is further desirable that the prevention is achieved with minimal performance cost. As will be disclosed, the present invention provides for a method and apparatus that advantageously achieves these and other desirable results.